What We Heard at Embedded World North America 2026

Event Recap

The Opal Kelly booth at Embedded World North America 2026, with the demo counter, display counter, and FrontPanel and product backdrops

We spent September 22 to 24 in Anaheim at Embedded World North America 2026, and the booth stayed busy all three days. Our demo counter ran two setups: a scope app streaming from the new SYZYGY Hub with a digitizer peripheral, and an XEM8320 pulling video from a SYZYGY camera, with TensorFlow doing object detection on the host laptop. The other counter held SYZYGY peripherals, product catalogs, and our screwdriver keychains.

The demos started the conversations, and the conversations are where we learned the most. These are the themes that kept coming up.

AI is part of the job now, and everyone uses it differently

AI came up in almost every conversation at the booth. Nobody described a standard way of working with it. Each engineer had settled on tools and habits that fit how they already work, and nearly all of them said it was saving them time.

One visitor had built his test systems on National Instruments hardware for years. He had tried Nigel, the AI assistant NI added to its software, and it hadn't done much for him. He still uses AI every day. On his commute he uses Perplexity to build and refine his team's backlog, so he gets to work with the week's tasks already sorted. None of that AI runs inside his test programs. It sits in the planning around them, which is where it pays off for him.

Another group came at it from the software side. They were software-first teams looking for an embedded partner to help bring FPGAs into their products, and they expected the FPGA part to feel foreign. Then they saw FrontPanel 6. A FrontPanel Platform app is a standard TypeScript and React project, so Claude Code, Cursor, and Copilot work on it the same way they work on any web app. On the SYZYGY Hub, an MCP server lets those same tools read from and control the FPGA in plain language. Seeing their own tools in the loop changed how they talked about the project. A few of them started sketching a different team: an FPGA specialist for the gateware, possibly one of our Experts, with their own developers owning the host application.

The FrontPanel 6 App Launcher and a sensor dashboard running on a laptop
FrontPanel 6. Platform apps are TypeScript and React projects, so the AI coding tools your team already uses work on them as they are.

“We're moving along with our customers towards highly productive programming environments, and it's all much more AI-enabled, which is really important.”

Steve Johnson, President, Opal Kelly, at Embedded World 2026 in Nuremberg.

More of the work is moving to the host PC

We also heard real openness to moving away from the SoC. For a long time the default for an FPGA product with software attached has been an SoC: an Arm core next to the fabric, Linux on the Arm, everything on one chip. Several people told us they are rethinking that when a PC is already sitting next to the hardware.

A desktop CPU or GPU has far more compute than an embedded Arm core, the team already knows how to write software for it, and updating a Python script or a web app is quicker than rebuilding a PetaLinux image. The FPGA keeps the deterministic, high-speed I/O and signal processing and sends results to the PC over a fast link. FrontPanel handles that link: USB firmware, HDL endpoints in the fabric, and host APIs in Python, C++, C#, and Java, plus TypeScript through FrontPanel Platform. Some places this split works especially well:

Bench test and measurement. The FPGA captures and timestamps, and the PC handles analysis, storage, and the UI. UNH-IOL builds its Ethernet compliance test systems on Opal Kelly modules, and Swabian Instruments' Time Tagger hands its data to Python and MATLAB on the host.

Machine vision and AI inference. Our booth demo is a small version of this. The XEM8320 handles the camera interface and preprocessing, and the host runs the TensorFlow model. When a better model comes out, it goes onto the PC and the gateware stays the same.

Sensor and semiconductor evaluation. Engineers characterizing a new ADC, image sensor, or detector change their test plans constantly. With the sweep logic in Python on the host, a new test is an edit and a rerun.

Prototypes headed for custom hardware. Enginuiti uses the XEM7310 and the FrontPanel API to validate interfaces and algorithms weeks or months before the final carrier board exists.

Research labs. The person writing the analysis code is often a grad student who knows Python and has no reason to learn Yocto.

An Opal Kelly XEM8320 module and camera board connected by USB to a laptop
Inference on the host. The XEM8320 handles camera capture and preprocessing, and the model runs on the laptop.

An SoC still makes sense for a system that runs without a PC nearby, or one with tight size and power limits. For those, the ECM1900 puts an AMD Zynq UltraScale+ MPSoC on a compact module. When a PC is going to be in the setup anyway, it's worth asking how much of the work it should take on.

Students asked what to learn with AI coming

We met a lot of students in Anaheim, and many of them asked us a version of the same question: if AI is writing more of the code every year, what should I focus on?

We pointed them to our FPGA roundtable series. Andrew Newman of Digital Design Corporation (DDC), a member of our Experts program, joined us for a session, and his advice to engineers coming up now was to focus on debug.

AI tools write HDL and host code faster every year. They help much less when the board doesn't do what the simulation said it would. Reading an ILA capture, probing a signal on a scope, tracking down a timing failure, and working out why a peripheral isn't coming up are skills that hold up no matter who or what wrote the code. Debug is also where you learn how the hardware actually works.

For students and instructors, the SYZYGY Hub is a good place to build those skills. It ships with FrontPanel 6, example apps, and pre-built gateware, so you can have a working system on day one and then start breaking things on purpose. The Developer Kit adds the SZG-DBG-STD pass-through debug board, which exposes the signals between the carrier and a peripheral, and the SZG-TST-STD loopback board for testing ports.

The SYZYGY Hub with ADC, data-acquisition, and breakout peripherals attached across its three SYZYGY ports
The SYZYGY Hub with ADC, data-acquisition, and breakout peripherals on its three SYZYGY ports.

Everyone wants more bandwidth, modularity, and COTS hardware

This last theme ran through nearly every conversation. Sensors produce more data every year, schedules keep getting shorter, and teams don't want to design every board from scratch. People asked about bandwidth, about changing I/O without a board respin, and about hardware they can still buy in five years.

The SYZYGY Hub, XEM8320, and other Opal Kelly boards on the display counter at Embedded World North America 2026
The display counter in Anaheim. The SYZYGY Hub and XEM8320 alongside other Opal Kelly modules and SYZYGY peripherals.

Bandwidth. The SYZYGY Hub connects over USB 3.2 Gen 2 (10 Gbps). The XEM8320 moves more than 350 MiB/s over USB 3.0 in real-world transfers and adds two SYZYGY Transceiver ports and two SFP+ cages for faster links. For larger designs, the XEM8370 puts a Kintex UltraScale+ FPGA and 4 GiB of DDR4 on one module.

Modularity. SYZYGY changes what a carrier does when you plug in a different peripheral. More than 20 peripherals cover cameras, ADCs and DACs, data acquisition, Ethernet, and breakouts. SmartVIO sets each port's I/O voltage from what the attached peripheral supports. SYZYGY is an open standard, and third-party vendors are building peripherals of their own.

COTS. Opal Kelly modules are built for production as well as prototyping. The XEM8310 is the production counterpart to the XEM8320: the same Artix UltraScale+ FPGA on a compact module with three mezzanine connectors, ready to design into a product. Every product page lists its lifecycle status, and step pricing is available for volume programs.

“Having COTS availability for the components has reduced the ongoing risk to the project at large. In case of failures, replacements can be procured from Opal Kelly in a timely manner in order to resume work.”

A few more things we heard

Memory and lead times. Several visitors asked about DDR4 supply and lead times. Memory is tight across the industry right now. If you're planning 2027 volume, talk to us early so we can plan material with you.

One app on every lab machine. Teams with a mix of Windows, Mac, and Linux machines liked that a FrontPanel Platform app runs on all of them, and on Raspberry Pi, from one codebase.

Where to start

If one of these conversations sounds like your project, these are the boards we pointed people to most.

Thanks to everyone who stopped by in Anaheim. If we talked at the show and you have a follow-up question, or you missed us and want to see the demos, reach out. Next up is SPIE Photonics West, February 2 to 4, 2027, at Moscone Center in San Francisco.

Keep the conversation going

See the demos, ask about your project, or pick up where we left off at the booth.

Learn more