Why SmartVIO Is Part of Every SYZYGY Carrier

If you're designing a SYZYGY carrier, you may have noticed that the specification requires something most connector standards leave optional: SmartVIO, the mechanism that automatically negotiates and supplies the correct I/O voltage to connected peripherals. We're sometimes asked why this is a requirement rather than a recommendation, and it's a fair question, since it does add components and firmware to a carrier design. With the release of our new SmartVIO Design Guide, we thought it was a good time to explain the reasoning, and to show that the implementation is a lot more approachable than it might first appear.

What is SmartVIO, and what problem does it solve?

SmartVIO is SYZYGY's mechanism for automatically supplying the correct I/O voltage to connected peripherals. Rather than fixing the carrier's I/O supply at design time, a SmartVIO carrier determines the right voltage at power-up, based on what's actually plugged in. Every SYZYGY peripheral stores a DNA record: a small data structure, served by an inexpensive microcontroller on the pod, that describes the peripheral's electrical requirements, including the range of I/O voltages it can accept. The carrier's SmartVIO controller reads these records, works out a voltage that satisfies every connected peripheral, and configures an adjustable regulator to supply it. All of this happens automatically during power-up, before the FPGA design or host software is ever involved.

The problem this solves is a familiar one. Anyone who has worked with FPGA peripherals has dealt with the voltage question. Different peripherals expect different logic levels, and getting it wrong ranges from a design that doesn't work to hardware that gets damaged.

Without SmartVIO, someone has to know in advance which peripherals will be connected and set the I/O voltage to suit, either hard-wired by the carrier designer or left to the user with a jumper or DIP switch. This works well enough for a fixed design where the peripherals are known up front. But it breaks down when the carrier is meant to be general-purpose, or when a user connects a peripheral the designer didn't anticipate. Manual voltage settings also leave room for simple mistakes, and a mismatch between a peripheral's required logic voltage and the carrier's I/O supply can damage hardware on both sides of the connector: the user's peripheral, and the carrier you designed.

SmartVIO addresses this at the standard level. The negotiation happens over I2C: the controller reads each peripheral's DNA, computes the intersection of their acceptable voltage ranges, and enables the VIO supply only once a voltage that works for everyone has been found. And if the connected peripherals turn out to be incompatible (no shared voltage range exists), the controller leaves VIO disabled rather than applying a voltage that could cause harm. Getting the voltage right is only half the job; refusing to apply a wrong one is the other half.

That refusal is worth more than it might seem. Once a carrier ships, users will connect peripherals you never tested, from vendors you may never have heard of, and there is no way to anticipate every mistake they will make. A carrier that declines to power an unknown or incompatible peripheral limits the damage those mistakes can do, to the user's system and to the hardware you designed, without a support case or a returned board to sort out afterwards.

Why it's a requirement

SmartVIO is what makes the ecosystem work. A carrier with a fixed I/O voltage is only compatible with the subset of peripherals that happen to accept that voltage. A SmartVIO carrier is compatible with any compliant peripheral, including ones designed years after the carrier ships, without any carrier-side changes. It also supports mixed-voltage systems: peripherals with different requirements can share a carrier by being placed in separate, independently regulated VIO groups. Our SYZYGY Hub is laid out this way, with ports A and B in one group at 1.2 to 1.8 V and port C in a second group at 1.2 to 3.3 V, so a low-voltage ADC and a 3.3 V breakout can run side by side. And it takes the voltage question out of your documentation, since there is no jumper table to publish and no per-peripheral compatibility note to keep current.

Just as importantly, the requirement is a promise that runs in both directions. Because every compliant carrier implements SmartVIO, peripheral designers can build to a single standard and trust that their pod will receive a correct voltage on any carrier it's plugged into. That mutual guarantee is what lets carriers and peripherals from different designers work together, and it only holds if SmartVIO is universal. That's why a carrier without it has the connector, but not the ecosystem.

The implementation is modest

The good news is that SmartVIO asks relatively little of your design. The added hardware is an adjustable regulator, a small MCU, and supporting passives, all inexpensive parts that are widely available. An ATmega328P, at under $2, is more than adequate for the controller and leaves room for other carrier functions. The controller doesn't need to be a dedicated part, either: it can share a larger system MCU, run as a soft core in the FPGA, or run as software on the processor cores of an SoC, as it does on our Brain-1 carrier.

Much of the design work is already done. Our open-source syzygy-tools library provides a portable C implementation of the complete controller sequence (DNA parsing, CRC validation, and the VIO solver, along with a test suite) that runs on even very simple, very low-cost MCUs. We also provide reference firmware for the peripheral-side MCU (avr-dna-fw, targeting the ATtiny44A), reference schematics, and specific IC recommendations. For most designs, the work is integration rather than invention.

The design guide

The SmartVIO Design Guide covers the full implementation in detail: controller options, peripheral MCU requirements, the power distribution system, regulator selection, and practical considerations like soft-start and cable derating. If you're designing a SYZYGY carrier or peripheral, we hope it makes the path from specification to working hardware a clear one, and if you have questions along the way, we'd be glad to help.

If it's a peripheral you're designing, the SYZYGY Hub gives you a compliant carrier to test it against for $499, with FrontPanel handling the host side while you bring the pod up.