FPGA Roundtable Replay: AI, Modular Hardware, and Web Tools

Steve Johnson, president and COO of Opal Kelly, and Andrew Newman, staff engineer at Digital Design Company (DDC), joined Embedded Computing Design editor-in-chief Ken Briodagh for an hour on how AI, modular FPGA hardware, and web-native tools are changing the way instrumentation and control systems get built. The full replay is above, and the main takeaways are below.

About the roundtable

Instrumentation and control systems have long started with months of custom board design, low-level HDL work, and one-off host software. The roundtable looks at three changes to that process. Pre-validated FPGA modules take board design and bring-up off the schedule. Web-native tools let teams configure and monitor hardware from a browser. AI speeds up testbenches, host code, and other work around the FPGA design, and opens FPGA-based systems to domain experts who are not FPGA specialists. The speakers cover where each of these saves time in practice and where it adds new risk.

AI support for FPGA design trails software

Language models learn from public code, and there is far less HDL available than Python or JavaScript, split across vendors, languages, and toolchains. Both speakers expect AI help for FPGA design to keep lagging for that reason. Well-documented blocks such as a UART come out fine. One-off designs with no published reference are where the tools get lost.

Testbench generation already works. Andrew uses AI to write a Verilog testbench, connect it to the existing simulator, and compare results against golden data. For running AI models on an FPGA, he finds the vendor flows still behind processor targets: stock models such as YOLO have examples, and anything else can hit unsupported activation functions or need retraining and requantization.

Documented interfaces are what AI uses reliably

Steve pointed to the USB interface on Opal Kelly boards. It is structured, managed, and documented, so an AI assistant can write host code against it and get predictable results. Opal Kelly is applying the same approach to its SYZYGY I/O modules so the peripheral side of a design is as straightforward for AI to work with as the host side.

Teams shift toward domain experts

Experienced FPGA engineers are hard to hire, which limits where FPGAs get used. Steve expects more teams built around physicists, roboticists, and other domain experts, with one strong FPGA engineer or a design services partner such as DDC handling the most demanding parts of the FPGA design.

Andrew's advice to early-career engineers is to build debug and diagnostic skills, since AI amplifies an engineer who can judge its output and misleads one who cannot. Steve added that requirements and system-level design sit at the front of the new bottleneck and verification at the back, and AI contributes little to either on a product at the edge of what has been built before.

Buy the FPGA platform, build what sets the product apart

Andrew finds a dev kit faster and cheaper through development, though not always at production volume. He has seen designs start on a dev kit and ship on it when size, weight, power, and budget allow and volumes are low. When a kit lacks an interface, such as an unusual military connector, he builds an adapter or mezzanine card. He also counts expansion ports: one large FMC connector takes one card, and a board with several SYZYGY ports can take several off-the-shelf peripherals.

Steve's case covers the board itself, with its power systems and high-speed memory interfaces, and the supply chain behind it. DRAM lead times are running about a year and FPGA lead times are similar, and Opal Kelly's supplier relationships and volume absorb some of that. Opal Kelly's embedded products are lifecycle-managed, and some designed 10 to 15 years ago are still shipping.

Use AI on grunt work, keep engineers on the critical parts

Steve applies AI to reading datasheets, working out pinouts and pin mapping, and connecting well-defined interfaces. Parts of a system where failure is expensive stay with engineers. Andrew gets the most from AI on algorithm prototyping harnesses: the MATLAB or Python scripts that load and save images and run regression across data sets while he develops an image filter. He also described the limit. Asked to summarize a Vivado project, Claude spent 40 to 45 minutes crawling it for a memory map he could have pointed it to in seconds.

The speakers split on what offloading busywork costs. Steve said an assistant working in the background lowers the barrier to trying new ideas. Andrew named two costs: non-deterministic output has to be checked, which can take as long as doing the work, and engineers lose skills they stop practicing, including explaining their own design at review.

Instrument software is moving into the browser

Web development is where the tooling, the developers, and the AI training data are. Steve said it is where Opal Kelly sees the largest productivity gain from AI code generation: test UIs, example code, and internal tools built in a browser-based Electron environment. The FrontPanel Platform runs host apps the same way.

Andrew gave a bench example. A locally hosted web UI on an imaging setup with a radio front end let him start and stop recordings from his phone on the same network, without walking back to the setup each time.

Looking ahead

Andrew wants FPGA tools to pick up what software developers already have: code completion, linting, and testbench integration with frameworks such as cocotb. Steve is watching FPGAs become practical for more engineers and scientists, with modular hardware handling the power, memory, and host interface around the FPGA so a team can put its time into the signal processing or control logic.

Steve closed with the SYZYGY Hub, the smallest implementation of the Opal Kelly platform: an FPGA, a USB 3.2 Gen 2 (10 Gbps) host interface with FrontPanel IP and tools, and three SYZYGY ports, with kits for data acquisition, signal generation, and image acquisition. Andrew has used the Hub to connect several peripherals and stream their data to a capture setup over the 10 Gbps link. If you need help taking a design from architecture to working hardware, DDC takes on Opal Kelly-based projects at any stage.