XEM6001

FPGA Development Board with AMD-Xilinx Spartan 6

	1 PC
XEM6001 XC6SLX16 Xilinx Spartan-6, 32 Mb SPI flash	$334.95

The Opal Kelly XEM6001 is an FPGA development board based on a Xilinx Spartan-6 FPGA (XC6SLX16-2FTG256C). In addition to a high gate-count FPGA, the XEM6001 utilizes the high transfer rate of USB 2.0 for configuration downloads, enabling an almost instant reprogramming of the FPGA. The XEM6001 features flexible clocking with a multi-output clock generator that can generate clock frequencies from 1 MHz to 150 MHz. If higher frequencies are needed, the clock multipliers in the FPGA can be used.

The XEM6001 and other Spartan-6 products are now end-of-life. Please consider the XEM7001 (Artix-7 FPGA) as a possible migration replacement.

Contact [email protected] if you have any questions!

Block diagram

Features

FRONTPANEL VIRTUAL INTERFACE

Virtual interface elements such as buttons, LEDs, and hex displays make cumbersome "I/O Boards" a thing of the past.

ABUNDANT I/O

86 I/Os and 6 CLK pins are all arranged on a common 0.1" grid for easy prototyping.

32 Mib SPI SERIAL FLASH

A 32-Mbit SPI Serial Flash device is included for FPGA configuration or general data storage. An on-board switch lets you choose between USB or Flash for FPGA configuration, enabling full stand-alone operation. USB communication via FrontPanel is available in either mode.

MULTI-OUTPUT PLL

The on-board PLL provides flexible clocking to the FPGA and expansion connectors.

Customer Deployments

Test system for laser toner remanufacturing equipment
Test chips used in power modules
Test equipment for infrared cameras
Custom boards for aerospace
X-ray and gamma-ray radiation detectors

Applications

Test fixtures
Rapid hardware prototyping
Data acquisition
Student / hobbyist FPGA module
Evaluation platform for your product
Custom test equipment

Technical Specifications and Support

Features & Specifications

Small form-factor -- credit-card sized (3.5" x 2.0" x 0.61" / 88.9mm x 50.8mm x 15.4mm)
High-speed USB 2.0 interface for downloading and control
Bus-powered or self-powered operation
Clock generator PLL for programmable clock rate
32 Mb SPI flash for general storage or standalone FPGA configuration
Four pushbuttons
Eight LEDs
Two 50-pin dual-row 0.1" headers (74 I/Os, including 9 GCLKs)
Single 20-pin dual-row 0.1" header (16 I/Os, including 4 GCLKs)
JTAG header
All four headers arranged on a common 0.1" grid
Full FrontPanel virtual control panel support
Transfer rates of up to 36 MBytes/second between the PC and FPGA
Complete Application Programmer's Interface (API) in C, C++, C#, Ruby, Python, and Java